Samsung is collaborating with TSMC to secure a base die supply for NVIDIA's newly announced NVHBM memory standard. This architecture integrates the controller into the 3D HBM stack, significantly enhancing performance and efficiency. Compared to standard HBM4E, NVIDIA claims up to 30% more memory bandwidth, 15% lower HBM power consumption, and up to 25% more usable compute die area.
A key requirement for the base die is TSMC's 3 nm node, forcing Samsung to partner with its competitor despite having its own production capabilities. This arrangement applies only to the base die, while Samsung continues to use its sixth-generation 10 nm processes for the memory stacks. Samsung has already begun shipping HBM4E with speeds of 14 Gbps per pin.
This development significantly boosts confidence in Samsung's Semiconductor division. Considering NVIDIA's claimed 30% bandwidth improvement, a single NVHBM could theoretically achieve around 5.2 TB/s. The 15% reduction in HBM power draw provides additional thermal headroom for the compute die.
Source: TechPowerUp News · Summarized by HeadlinesBriefing