Intel unveiled its 18A‑P process at the VLSI 2026 Symposium in Honolulu, claiming a 9% performance increase at unchanged power or 18% power savings at the same performance level versus the baseline 18A. The node retains the 18A transistor density of Panther Lake, giving teams a boost without waiting for the next 14A shrink. Test chips use an Arm core sub‑block to validate scaling.

Beyond raw speed, Intel tightened the node’s skew corners by 30%, shrinking the performance‑power gap between fast and slow transistors. This tighter distribution improves parametric yields and makes chip behavior more predictable, a boon for manufacturers. Because density remains identical to 18A, external customers can adopt 18A‑P for better efficiency without redesigning floorplans across multiple product families and improves overall reliability.

The 18A‑P enhancements position Intel to extend the life of its current‑generation fab while offering OEMs a clear performance or power advantage. Chipmakers seeking to meet tight thermal budgets or to squeeze extra clock headroom will likely gravitate toward the new process, reinforcing Intel’s roadmap ahead of the eventual 14A transition. It also eases thermal design.