Trend Force's latest research reveals that GPU suppliers and hyperscale cloud service providers are developing increasingly powerful AI chips, making larger package sizes a key priority for 2.5D packaging. Although TSMC's CoWoS-L faces competition from Intel's EMIB-T, its advantages in technology maturity and yield are expected to keep it the mainstream packaging solution for AI chips through 2028. Strong AI demand continues to support NVIDIA's push toward integrated rack-scale solutions, with NVIDIA's high-end GPU shipments expected to grow approximately 30% year-over-year in 2026.

AMD is aggressively promoting its MI400/MI450 series beginning in the second half of 2026, providing further momentum to overall shipments. Google is expected to lead among CSP-developed ASICs in both shipment volume and growth momentum in 2026, with TPU v7 serving as its primary product. AWS is also expanding aggressively, with its chips and AI server systems gradually transitioning to Trainium v3 beginning in 2H26.

Microsoft and Meta currently remain more heavily reliant on GPU servers, with comparatively smaller ASIC deployment plans. Strong AI chip demand tightens TSMC packaging capacity, creating potential spillover opportunities for Intel EMIB-T. AI server chips have mainly used TSMC's CoWoS-S packaging, which employs a silicon interposer to connect HBM with compute dies.

However, as chip sizes grow and more HBM modules are added, manufacturing the silicon interposer is nearing its physical limits. The industry needs to shift toward CoWoS-L solutions that allow for larger reticle-size exposures. CoWoS-L offers greater flexibility by embedding high-speed silicon bridge dies within the interposer, enabling better integration and interconnection between compute dies and HBM.

NVIDIA and AMD AI accelerators have already adopted CoWoS-L. Among AI ASICs, Meta's MTIA 400 already uses CoWoS-L, while AWS and Microsoft are also expected to adopt CoWoS-L in 2027. However, the larger interposer required by CoWoS-L raises packaging costs, while persistent constraints on TSMC's packaging capacity have further increased interest in Intel's EMIB technology as an alternative.

Google is expected to adopt EMIB-T packaging in 2027, while AWS is also testing EMIB technology. Although EMIB-T competes directly with CoWoS-L, CoWoS-L's advantages in technology maturity and yield are expected to keep it as the mainstream packaging technology for AI chips through 2028.