AMD starts shipping its next‑gen EPYC processor, Venice, built on TSMC’s 2 nm process in Taiwan, with plans to scale production in Arizona. The launch signals a key step in AMD’s data‑center roadmap, delivering higher performance and better energy efficiency for cloud, enterprise and AI workloads.

The move follows AMD’s long‑standing partnership with TSMC, whose advanced lithography underpins the industry’s fastest CPUs. Dr. Lisa Su highlighted that Venice will shorten the gap between AI innovation and production, a critical need as agentic workloads grow.

Venice’s production ramp coincides with AMD’s broader strategy to field Verano, a 6th‑gen EPYC aimed at performance‑per‑dollar‑per‑watt. By pairing cutting‑edge design with global manufacturing, AMD strengthens its foothold in the server market and supports customers scaling AI infrastructure.

AMD’s 2 nm EPYC line will now occupy a central role in modern data centers, offering the compute density and efficiency required for increasingly power‑constrained AI applications.