Rambus has unveiled a new chipset designed to power the next generation of AI server memory. The SOCAMM2 (Small Outline Compression Attached Memory Module) chipset enables low-power, high-performance LPDDR5X-based memory modules specifically built for AI data center infrastructure. This marks the company's first step toward a broader roadmap of LPDDR-based server module solutions.

SOCAMM2 replaces traditional soldered LPDDR memory with detachable, upgradable modules that combine LPDDR efficiency with server-class serviceability. The Rambus chipset supports reliable operation at speeds up to 9.6 Gb/s, featuring an SPD Hub for module identification and configuration, along with 12-amp and 3-amp voltage regulators for localized power conversion. This approach allows data centers to scale memory more flexibly while maintaining performance.

The rapid diversification of AI-driven data center workloads is pushing traditional memory architectures to their limits. Industry analysts from IDC emphasize that SOCAMM2 represents a critical evolution in balancing performance with power efficiency. Micron's Praveen Vaidyanathan noted that the industry needs a robust ecosystem around LPDDR-class server memory as AI pushes compute performance and power budgets to new extremes.

This chipset positions Rambus at the forefront of memory innovation for AI infrastructure, directly addressing the growing need for scalable, efficient, and serviceable memory solutions in modern data centers.