Samsung detailed its aggressive roadmap for future semiconductor manufacturing at the recent SAFE Forum. The company is pushing beyond its current offerings with upcoming 2nm nodes like SF2P, promising a 26% power reduction and 15% clock speed increase. Much of these gains stem from Design-Technology Co-Optimization (DTCO), a methodology merging chip design and manufacturing.

Further iterations like SF2P+ are slated for 2027-2028, while a specialized SF2X node targets AI hardware. Samsung is also focusing on integrating more on-chip SRAM, essential for AI accelerators, citing work with Groq on an LLM chip boasting over 500MB of SRAM. This drive for denser, faster chips is critical for powering next-generation AI applications.

Looking further ahead, Samsung confirmed its 1.4nm process family, starting with SF1.4, is now scheduled for mass production in 2029. This represents a slight delay from earlier projections but signals Samsung's continued pursuit of shrinking transistor sizes. The company also announced SF1.4+ for 2030, continuing its push into sub-nanometer manufacturing.