TSMC's 2 nm node is experiencing significant client interest, with Senior Vice President Kevin Zhang reporting a fourfold increase in tape-outs compared to the 3 nm node. This surge is driven by the new gate-all-around FET nanosheet transistor technology, which offers up to a 15% performance boost or a 30% power reduction. The technology also provides a 15% increase in transistor density.

Despite high-volume production of the N2 node slated for Q4 2025, it currently represents only 3% of TSMC's revenue, with 3 nm at 30% and 5 nm at 33%. However, this is expected to shift as more 2 nm chips are delivered. Key customers for the N2 node include AMD for EPYC server CPUs and Apple for A20 Pro chips.

TSMC plans further advancements with N2P in the latter half of this year, followed by N2X in 2027 and N2U in 2028, ensuring the 2 nm node family remains a prominent, long-lived process contributing significantly to future revenue.