SK hynix has begun shipping samples of its next-generation HBM4E memory to customers, delivering 16Gbps per pin bandwidth. This represents a significant leap over the previous HBM4 standard's 10Gbps per pin performance. While Samsung started sampling its own HBM4E design a month ago at 14Gbps per pin, SK hynix is pushing the envelope with higher speeds.

The current design features 12 stacked dies creating a single stack with 48GB capacity. Most AI accelerator systems will combine multiple stacks to achieve even higher memory capacity. AI hardware demands specialized memory because traditional DDR modules lack the necessary bandwidth for high-performance computing tasks. HBM's vertical stacking approach dramatically increases data throughput.

SK hynix claims its HBM4E consumes 20% less power than the prior HBM4 generation while also running cooler. The company uses MR-MUF (Mass Reflow Molded Underfill) technology, which injects protective liquid between silicon layers to safeguard circuits. This construction results in 17% lower thermal resistance, improving overall system cooling.

The memory manufacturer credits its advanced HBM development expertise for delivering the 12-stack HBM4E samples on schedule. SK hynix states it will collaborate closely with partners to transition to mass production promptly, positioning itself competitively in the AI chip supply chain.