Samsung has begun mass production and shipping of HBM4 memory, delivering the first products to customers with speeds of 11.7Gbps per pin. The new memory standard uses a 6th generation 10nm-class DRAM process called "1c" combined with a 4nm logic base die for improved performance. This configuration delivers a total bandwidth of 3.3 terabytes per second, representing a 2.7x increase over HBM3E.

Despite JEDEC standardizing HBM4 with lower per-pin bandwidth than HBM3E (8Gbps vs 9.6Gbps), Samsung has exceeded expectations by achieving 11.7Gbps while doubling the pin count from 1,024 to 2,048. The company also anticipates future chips capable of 13Gbps per pin. Current HBM4 products use 12-layer stacking technology with capacities ranging from 24GB to 36GB, though Samsung plans to offer 16-layer designs with up to 48GB capacity based on customer needs.

Samsung's HBM4 memory incorporates low-voltage through silicon vias and an enhanced power distribution network, improving power efficiency by 40% while reducing heat resistance by 10% and increasing heat dissipation by 30% compared to HBM3E. The company predicts memory sales will triple in 2026 compared to 2025 and expects to sample next-generation HBM4E memory to customers in the second half of 2026.