BOLOGNA, Italy — The state of the RISC-V union is “strong,” declared Krste Asanović, chief architect at SiFive and RISC-V International, opening the RISC-V Summit Europe 2026. After dominating embedded electronics, the open-standard ISA now targets enterprise data centers. Major players including Qualcomm, Nvidia, Meta, Google, and Alibaba are integrating RISC-V technology.

The RVA23 standard, approved October 2024, anchors this server push. “We’re on this widespread adoption in application processors… you’re starting to see the promise of high-performance RVA23 silicon actually appearing,” Asanović said. Hyperscalers are investing in RISC-V as an alternative to incumbent architectures for greater technical and business-model flexibility.

New optimization guidance options like Oilsm and Ovlt align hardware and software on performance expectations, raising the bar for competitive implementations. For AI, RISC-V’s modularity fits the “Wheel of Reincarnation” cycle, scaling from host ISA to self-hosted accelerators. Security advances include CHERI implemented as new base ISAs RV32Y and RV64Y, providing hardware-enforced memory safety without fracturing the ecosystem.

While expanding to cloud servers, RISC-V continues strengthening its microcontroller foundation, balancing diversity with ecosystem cohesion.