Cadence announced the industry's first LPDDR5X 9600 Mbps memory IP system, designed for enterprise and data center reliability. The solution combines Cadence's IP with Microsoft's RAIDDR error correction code, targeting AI and HPC workloads where power efficiency is critical. Hyperscalers have long traded power savings for reliability when using LPDDR5X versus standard DDR5.

This new architecture claims to bridge that gap, offering DDR5-style symbol-based ECC while maintaining high performance in a compact form factor. Microsoft is the first customer deploying the system. Boyd Phelps of Cadence called the 9600 Mbps milestone a major step for high-performance, low-power systems.

Saurabh Dighe at Microsoft noted the collaboration helps drive industry adoption of more efficient data center solutions. As AI infrastructure demands explode, reducing energy consumption without sacrificing uptime is a primary goal for major cloud providers. This IP release follows Cadence's LPDDR6 launch in July 2025, signaling a continued push for faster, more efficient memory standards.