Intel has unveiled its Xeon 6+ processors codenamed 'Clearwater Forest,' the first data center CPUs built on the company's 18A fabrication process. These processors pack up to 288 energy-efficient Darkmont cores and feature Advanced Matrix Extensions, QuickAssist Technology, and Intel vRAN Boost for telecom, cloud, and edge AI workloads.

Each Darkmont core includes a 64 KB L1 instruction cache, a broader fetch and decode pipeline, and a deeper out-of-order engine. The design groups cores into four-core blocks sharing 4 MB of L2 cache, resulting in approximately 1,152 MB of aggregate last-level cache. This massive cache pool aims to keep data close to hundreds of active cores and reduce dependence on external memory bandwidth.

The processors maintain drop-in compatibility with current Xeon server sockets and support 12 memory channels with DDR5-8000. They also offer 96 PCIe 5.0 lanes with 64 lanes supporting CXL 2.0. Intel positions these chips for virtualized RAN and edge AI inference, allowing operators to handle workloads typically reserved for power-hungry accelerators.