IBM announced the world’s first sub‑1 nanometer processor, built on a 0.7 nm (7 angstrom) node with its new “nanostack” 3‑D architecture. The chip fits roughly a fingernail‑sized die and houses 100 billion transistors, about twice the density of IBM’s 2 nm part released in 2021. IBM says the design significantly delivers up to 50 percent higher performance and 70 percent better energy efficiency overall than the previous generation.

The nanostack approach vertically stacks and staggers nanosheet transistors, allowing each layer to use distinct materials optimized for speed or power. Researchers validated the concept with ultra‑thin dielectric bonding, dual‑channel engineering, and functional CMOS inverters that met expected switching speeds. At VLSI 2026 the team showed a 40 percent SRAM density gain, easing bandwidth pressure for AI workloads.

IBM positions the 0.7 nm node as the first step in a decade‑long scaling roadmap, targeting volume production within five years. The breakthrough relies on High NA EUV lithography tools from ASML and collaborations with Lam Research, Tokyo Electron and SCREEN Semiconductor. By pushing transistor features to atomic dimensions, IBM aims to keep Moore‑law‑style gains alive for next‑generation cloud, generative AI and edge devices.