Researchers have built a programmable probabilistic computer with 1,000,000 p-bits by networking FPGAs into a single Ising machine. This breaks past single-chip limitations that capped traditional p-bit systems. The distributed architecture performs Gibbs sampling at over a trillion flips per second while maintaining coupling weights in local on-chip memory.

Previous p-bit computers were confined to individual chips, limiting their capacity and memory bandwidth. By connecting multiple FPGAs, the team created a scalable platform that exchanges only 1-bit boundary states between devices. This raises a fundamental question about distributed samplers: how often must boundary information refresh for partitioned machines to match monolithic behavior?

The answer lies in a timing ratio, eta = f_comm/f_p-bit, comparing boundary-exchange frequency to local update frequency. Above a topology-dependent threshold, the distributed system matches GPU reference performance. Below threshold, residual energy decays with a reduced exponent, creating a quantifiable throughput-accuracy tradeoff that turns parallelism into a design constraint.

A theoretical cluster mean-field model reproduces this behavior, confirming the tradeoff as universal for partitioned stochastic dynamics. The platform demonstrates applications across spin glasses, Max-Cut optimization, and Boolean satisfiability problems. This work provides both a scalable million-p-bit implementation and quantitative design rules for building larger probabilistic computers beyond single-chip boundaries.