We present a formal discrete framework for attention operators in Large Language Models via Persistent State Machines (PSMs). Computation is broadcast to stationary in‑memory cells that evaluate local deterministic state transitions.

Complete mathematical proofs are provided for quantization error bounds, a multi‑phase discrete Softmax construction under a bounded‑logits assumption, deterministic finite‑automaton equivalence with spatial factorization, and membership in DSPACE(O(n)).

Implementation feasibility was verified on contemporary programmable logic fabric. A low‑power evaluation on a Zynq‑7000 xc7z020 used a full 1024‑cell array (d=128) in an out‑of‑context block design. Post‑route SAIF analysis showed hardware‑level self‑activation gating that limits active switching to sparse cells, yielding a dynamic power estimate of below 1.0 mW and a normalized dynamic energy of 3.81 × 10⁻⁵ pJ/op.

System‑on‑Chip PCIe integration on an Ultra‑Scale+ xcvu9p demonstrated system‑level compatibility: a 256‑cell sub‑array representing a single‑head attention system was integrated into a full SoC with AMBA AXI4 interconnects and an AMD Xilinx PCIe Gen3 x1 Bridge. The design closed timing at a unified clock of 62.5 MHz (WNS = +1.854 ns), occupying only 0.67 % of logic slices and 0.00 % of DSP blocks. Functional simulation with over a thousand random vectors confirmed bit‑exact agreement with a fixed‑point software reference, supporting the scalability of the architecture.