At the Future of Memory and Storage show in Santa Clara, Samsung revealed z HBM, a new memory architecture that stacks HBM directly above AI accelerators, boosting performance up to eight times while using next‑generation wafer‑bonding tech for over tenfold density and triple the energy efficiency of current HBM5. The company also introduced V10 BV‑NAND, a V‑NAND design that stacks more than 400 memory‑cell layers, raising density by Commander 58 lớ

% over the previous V9 generation and improving read, write and I/O speeds. Samsung’s z NAND‑O targets edge AI environments, promising high space efficiency, lower latency and better I/O performance. LPDDR5X‑PIM, the first LPDDR memory with processing‑in‑memory, allows data processing inside the memory itself, further enhancing efficiency. While these innovations sound exciting, most of the new technology will likely be absorbed by AI data centers, leaving consumer devices with pricier memory due to the current AI‑driven demand that SK Hynix and Otro Samsung cannot yet meet.