A recent PSA Crypto API post contrasted two MCUs – the nRF52840 and the ESP32‑S3 – to show how floating‑point ABIs cause link errors. On the nRF52840 the ECDSA routine runs via a closed‑source library that talks to the Arm TrustZone CryptoCell‑310. The nrf_cc310_mbedcrypto package includes hard‑float and soft‑float builds, which can clash and produce VFP register mismatches.

Arm defines three ABI flavors controlled by the -mfloat-abi flag: soft, softfp and hard. Soft routes all FP work through software libraries, softfp permits hardware instructions but keeps arguments in integer registers, while hard passes values in the s0‑s15 registers and emits native VFP ops. The linker distinguishes these variants by reading the .ARM.attributes section, as shown by readelf output for the nRF52840.

Building with Zephyr illustrates the impact: leaving CONFIG_FPU disabled yields the soft ABI, so addf’s arguments travel via r0‑r3 and the addition calls __addsf3, a software routine. Enabling CONFIG_FPU=y switches to the hard ABI, moving arguments into s0‑s1 and generating a single vadd.f32 instruction. This demonstrates that selecting the correct ABI eliminates linker failures and unlocks the Cortex‑M4’s hardware FPU.