Apple Silicon MPS backend enables GPU-native execution of a fully neural CPU architecture. Researchers at nCPU project reimagined traditional CPU components as PyTorch tensors, replacing hardcoded logic with trained neural networks. Registers, memory, flags, and the program counter all reside permanently on GPU, with instruction execution handled by 13 specialized models. The system achieves 100% accuracy on integer arithmetic through models like arithmetic.pt for ADD/SUB operations and byte-pair LUTs for multiplication, verified by 347 automated tests.

Every ALU operation routes through GPU-optimized neural pathways. Addition uses Kogge-Stone carry-lookahead with 8 neural passes (248 us latency), while multiplication leverages 64-bit byte-pair LUTs (21 us). Shift operations employ attention-based bit routing, reducing 64 sequential passes to 3 batched operations (434 us vs 2,833 us). These innovations invert conventional CPU performance characteristics: multiplication (12x faster than addition) now outperforms addition, unlike traditional architectures where ADD dominates.

Benchmarks on Apple Silicon show 136--262 us/cycle execution (4,975 IPS), with fast mode achieving 1.35M IPS via native GPU tensor ops. The neural arithmetic models load in 60ms, while Metal Compute Kernels enable zero host CPU synchronization for maximum throughput. The architecture supports both text assembly (ncpu.model) and full ARM64 binary decoding via Qwen2.5-Coder-1.5B LoRA.

This GPU-native CPU implementation bridges hardware-software boundaries, demonstrating how neural networks can replicate classical CPU logic with comparable performance. Open-source models and Metal implementations suggest practical applications for edge computing and AI-accelerated systems programming.