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FPGA Scientific Calculator Built from Scratch in 1,593 Logic Cells

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During a 2021 Austin power outage, an engineer sparked a side project: build a scientific calculator from scratch on an FPGA. Inspired by the HP-41CV, the effort spans 10 chapters covering everything from microcode and CPU design to custom PCBs and a 3D-printed enclosure with HP yellow-and-red keycaps.

The framework runs one Verilog source across ModelSim, Verilator, Qt, and WebAssembly without modification. A custom CPU features 12-bit fixed-length instructions, Harvard memory, and 14 ALU operations including BCD-adjust logic borrowed from the 8086. Testing against thousands of verified vectors uses a Qt desktop simulator with source-level breakpoints.

The finished device lives in 1,593 logic cells on a small FPGA. A 2025 rewrite added guard digit tracking, banker's rounding, and a full trig suite validated against a rewritten C++ reference. Total hardware cost stayed around $5 for the initial dev board. All tools used were free.