In May 2026, a demo party in Ommen, NL showcased a 16‑byte x86 assembly routine that turns the classic Matrix‑style video buffer into a Sierpinski fractal and a live audio signal. The code writes to video memory and simultaneously streams Bit 1 to the PC speaker via port 61h.

The routine starts by setting VGA mode 0 with INT 10h, then points DS to 0xB800. A loop steps backward 56 bytes each iteration, performing LODSB, XOR, and OUT 61h. The XOR isolates Bit 1, producing a Rule 60 cellular automaton that maps directly to a square‑wave tone.

Because the step size of 56 bytes visits offsets that are multiples of 8, the algorithm wraps seven times over the 65,536‑byte segment, halving the fundamental frequency compared to a 16‑byte step. The visual output appears as a diagonal Sierpinski pattern, while the sound reflects the fractal’s pulse‑width variations.

This compact demo exemplifies extreme code density, blending graphics, mathematics, and sound into a single, reversible routine. It demonstrates how low‑level hardware interfaces can be repurposed for creative algorithmic art without compromising system stability.