NVIDIA is collaborating with Cadence and Synopsys to optimize critical EDA applications for the Vera CPU, deploying it across workflows for next-generation CPUs and GPUs. The Vera CPU combines 88 custom Olympus cores with high-efficiency LPDDR5X memory and second-generation Scalable Coherent Fabric, delivering strong per-core performance, high memory bandwidth, and consistent low latency for demanding engineering workloads.

Early testing on production-class workflows shows promising results. Cadence Jasper, a formal verification platform, and Synopsys VCS, a high-performance functional verification solution, both achieved up to 1.5x higher performance on selected workloads using the same core count. NVIDIA is working closely with both companies on application profiling, software optimization, and system-level tuning to improve engineering productivity across a broader range of workflows.

Faster execution shortens individual verification runs, while greater throughput enables engineers to evaluate more design alternatives and complete more validation within the same development window. These improvements accelerate the RTL-to-silicon flow spanning logic simulation, formal verification, regression testing, and digital implementation.

The deployment reflects NVIDIA's strategy to match compute architecture to workload. Looking ahead, the Rosa CPU powered by the Rigel core will extend this feedback loop, using NVIDIA CPUs to design future NVIDIA CPUs and GPUs, with each generation helping build the next.