JEDEC has previewed new features planned for the next version of its LPDDR6 memory standard, extending beyond mobile platforms into data center and accelerated computing workloads. The update introduces a narrower x6 per-die interface and non-binary interface widths (x12 and x24) that allow more memory dies per package, enabling higher capacities critical for AI-scale deployments.

The upcoming standard will support 512 GB density configurations, surpassing current LPDDR5/5X maximums to address growing AI training and inference memory demands. JEDEC is also developing an LPDDR6-based SOCAMM2 module standard offering a clear upgrade path from existing LPDDR5X modules, along with a Processing-in-Memory (PIM) specification that integrates compute directly into memory to reduce data movement and improve efficiency.

These developments position LPDDR6 as a unified memory solution spanning everything from mobile devices to AI infrastructure. The new specifications are designed to deliver higher capacities and better performance-per-watt than current-generation memory technologies.