RISCBoy is an open-source portable games console designed entirely from scratch — CPU, raster graphics pipeline, bus fabric, memory controllers, and a KiCad PCB layout. The project implements a RV32IMC RISC-V processor in synthesisable Verilog 2005 targeting the iCE40-HX8k FPGA, a LUT4 device with 7680 logic elements. Fitting a 32-bit console into that fabric required careful design; the core passes the RISC-V compliance suite, riscv-formal verification, and custom property checks for instruction frontend consistency and bus compliance. The PCB is compatible with iTead's 4-layer 5×5 cm prototyping service at $65 for ten boards.

The toolchain relies on the open-source FPGA flow: Yosys for synthesis, nextpnr for place-and-route, and Project IceStorm for bitstream generation. Builds run on Linux and Raspberry Pi. The repository structure separates HDL (busfabric, graphics, hazard5 processor, memory controllers, peripherals), software tests, simulation scripts driven by Xilinx ISIM, and synthesis makefiles for both HX8k and experimental ECP5 targets. Submodules pull in HDL dependencies and the RISC-V compliance suite.

Rev B hardware is on hold while gateware and bootloader mature. Current development uses a Snowflake FPGA board. The processor supports M-mode CSRs, exceptions, and a vectored external interrupt extension. On smaller FPGAs like the iCE40 UP5k, the design can downshift to RV32I, though the toolchain must be built with appropriate multilib variants to avoid runtime mismatches.

RISCBoy demonstrates that a complete, verified RISC-V SoC with graphics can fit in a modest open-source FPGA flow. It serves as a practical reference for constrained SoC integration, formal verification adoption, and end-to-end open hardware development — areas where commercial toolchains still dominate.