A longtime ThinkPad enthusiast and coreboot contributor successfully ported the ThinkPad X61 to Coreboot using AI-assisted reverse engineering. The author, who first encountered free software through GNU Emacs over a decade ago, amassed a collection of ThinkPads while contributing to the coreboot project. Missing from this collection was the X61, which uses unsupported GM965/ICH8 hardware.

The reverse engineering effort leveraged Claude Opus 4.6 alongside traditional firmware analysis tools. Using bios_extract to split the Phoenix BIOS image, the author combined ghidra-cli for PE32 memory initialization code with radare2 for 16-bit real mode firmware sections. The process required extensive hand-holding despite AI assistance, with the author needing to guide the model on over 20 technical details from prior similar platform work.

Key discoveries included finding multiple raminit versions in the firmware image, likely implementing A/B recovery layout. The memory controller supports DDR2 533MT/s and 666MT/s, not the higher speeds initially assumed. GPIO mux configuration for SMBUS on GPIO42 required careful handling to ensure SPD visibility during boot. Prior work by Lubomir Rintel using SerialICE proved valuable for tracing initialization sequences.

Testing involved flashing through a docking station RS232 UART connection, identical to the X60 setup. While the AI produced working code after just two prompts, the reality required significant manual intervention and validation. This demonstrates both the potential and current limitations of LLMs for complex firmware reverse engineering tasks.