Google has unveiled its eighth-generation Tensor Processing Units, introducing the TPU 8t for training and TPU 8i for inference. These custom chips represent a decade of development aimed at powering the next generation of AI agents and supercomputing workloads. The dual-architecture approach targets the specialized demands of modern AI, from massive model training to low-latency agent interactions.

TPU 8t is engineered as a training powerhouse, capable of scaling to 9,600 chips in a single superpod with 121 ExaFlops of compute. It delivers nearly 3x the performance per pod over previous generations while targeting over 97% goodput through advanced reliability features. The chip integrates 10x faster storage access and a new Virgo Network to enable near-linear scaling for up to a million chips.

TPU 8i focuses on inference workloads, addressing the memory wall with 288 GB of high-bandwidth memory and 384 MB of on-chip SRAM. It uses custom Axion Arm-based CPUs and a new Boardfly architecture to reduce network diameter by more than 50%. These chips are designed to handle the complex, iterative demands of AI agents that reason through problems and execute multi-step workflows, with general availability planned later this year.