Optimizing C software for modern CPUs requires balancing performance with portability. When building software sensitive to CPU capabilities, developers face a dilemma: the portable version performs poorly, but optional Instruction Set Architectures (ISAs) that could speed things up aren't guaranteed to be available. This article explores practical solutions for x86-64 processors.

One approach is leveraging compiler optimizations by targeting specific microarchitectures using flags like -march=native or -march=znver3. This works surprisingly well on x86-64, where microarchitecture levels provide clear capability baselines. Intel's x86-64-v1 through v4 levels represent evolutionary improvements, with v4 including AVX-512 support. However, market segmentation means lower-cost chips may lack these features, and some implementations have performance quirks.

For truly dynamic optimization, indirect functions (IFUNCs) offer a powerful solution. Using compiler attributes like target_clones, developers can create multiple function versions that the dynamic linker automatically selects at runtime based on available hardware. When IFUNCs aren't available, manual dispatching with compiler-specific pragmas and runtime CPU detection provides similar benefits. This approach enables sophisticated optimizations like avoiding AMD's slow BMI2 instructions before Zen 3 or Intel's AVX-512 downclocking issues. While implementation details vary across platforms, these techniques make it possible to deliver optimal performance without sacrificing portability.