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Inside the Space Shuttle's Revolutionary Multi-Threaded I/O Processor Architecture

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Each Space Shuttle carried five general-purpose computers weighing 120 pounds total, built from multiple circuit boards crammed with simple chips rather than modern microprocessors. The I/O Processor (IOP) sat in a separate aluminum-alloy box alongside the CPU, serving as the critical link between the main computer and the orbiter's 28 data bus networks.

What made the IOP remarkable was its architecture: one of the first multi-threaded computers implementing 25 virtual processors running on a single physical chip. These two circuit cards reveal the engineering marvel - a network interface card providing four high-speed connections at 1 Mbps each, and a microcode PROM page storing low-level processor instructions in metal fuses.

The network interface uses Manchester encoding, a technique invented at the University of Manchester in 1949 that solves synchronization and DC component problems in digital transmission. Custom Motorola chips handle the encoding and decoding, while hybrid modules shrink analog circuitry onto ceramic wafers for space reliability.

Six of these interface cards provided the IOP's 24 network connections, each twisted pair carrying Manchester-encoded data between computers and flight-critical systems. The extensive hand-wired rework visible on these boards shows how engineers iteratively improved these systems during the Shuttle program's decades of operation.